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| 74ACT16245 16-Bit Transceiver with 3-STATE Outputs August 1999 Revised May 2005 74ACT16245 16-Bit Transceiver with 3-STATE Outputs General Description The ACT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. Features s Bidirectional non-inverting buffers s Separate control logic for each byte s 16-bit version of the ACT245 s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Order Number 74ACT16245SSC 74ACT16245MTD Package Number MS48A MTD48 Package Description 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Logic Symbol Connection Diagram Pin Description Pin Names OEn T/R A0-A15 B0-B15 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs/Outputs Side B Outputs/Inputs FACT is a trademark of Fairchild Semiconductor Corporation. (c) 2005 Fairchild Semiconductor Corporation DS500296 www.fairchildsemi.com 74ACT16245 Functional Description The ACT16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the T/R input is HIGH, then Bus A data is transmitted to Bus B. When the T/R input is LOW, Bus B data is transmitted to Bus A. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each byte. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Truth Tables Inputs OE1 L L H Inputs OE2 L L H H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Outputs T/R1 L H X Bus B0-B7 Data to Bus A0-A7 Bus A0-A7 Data to Bus B0-B7 HIGH-Z State on A0-A7, B0-B7 Outputs T/R2 L H X Bus B8-B15 Data to Bus A8-A15 Bus A8-A15 Data to Bus B8-B15 HIGH-Z State on A8-A15, B8-B15 Logic Diagram www.fairchildsemi.com 2 74ACT16245 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI VI VO VO 0.5V to 7.0V 20 mA 20 mA 20 mA 20 mA 0.5V to VCC 0.5V r 50 mA r 50 mA 65qC to 150qC Recommended Operating Conditions Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate ('V/'t) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. 4.5V to 5.5V 0V to VCC 0V to VCC 0.5V VCC 0.5V 0.5V VCC 0.5V DC Output Diode Current (IOK) 40qC to 85qC 125 mV/ns DC Output Voltage (VO) DC Output Source/Sink Current (IO) DC VCC or Ground Current per Output Pin Storage Temperature DC Electrical Characteristics Symbol VIH VIL VOH Parameter Minimum HIGH Input Voltage Maximum LOW Input Voltage Minimum HIGH Output Voltage VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum LOW Output Voltage 4.5 5.5 4.5 5.5 IOZT IIN ICCT ICC IOLD IOHD Maximum I/O Leakage Current Maximum Input Leakage Current Maximum ICC/Input Max Quiescent Supply Current Minimum Dynamic Output Current (Note 3) 5.5 5.5 5.5 5.5 5.5 0.6 8.0 0.001 0.001 TA Typ 1.5 1.5 1.5 1.5 4.49 5.49 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 25qC TA 40qC to85qC 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 Guaranteed Limits Units V V V VOUT VOUT Conditions 0.1V 0.1V or VCC 0.1V or VCC 0.1V IOUT VIN 50 PA VIL or VIH V IOH = 24 mA IOH = 24 mA (Note 2) V IOUT VIN 50 PA VIL or VIH V IOL = 24 mA IOL = 24 mA (Note 2) VI VO VI VI VIN VOLD VOHD VIL, VIH VCC, GND VCC, GND VCC 2.1V VCC or GND 1.65V Max 3.85V Min r0.5 r0.1 r5.0 r1.0 1.5 80.0 75 PA PA mA PA mA mA 75 Note 2: All outputs loaded; thresholds associated with output under test. Note 3: Maximum test duration 2.0 ms; one output loaded at a time. 3 www.fairchildsemi.com 74ACT16245 AC Electrical Characteristics VCC Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay An, Bn to Bn, An Output Enable Time Output Disable Time 5.0 5.0 Parameter (V) (Note 4) 5.0 Min 3.2 2.6 3.7 4.1 2.2 2.0 TA CL 25qC 50 pF Typ 5.7 5.1 6.4 7.4 5.4 5.2 Max 8.4 7.9 9.4 10.5 8.7 8.2 TA 40qC to 85qC CL 50 pF Max 9.0 8.4 10.0 11.6 9.3 8.8 ns ns ns Units Min 3.2 2.6 2.7 3.4 2.2 2.0 Note 4: Voltage Range 5.0 is 5.0V r 0.5V. Capacitance Symbol CIN CPD Parameter Input Pin Capacitance Power Dissipation Capacitance Typ 4.5 25 Units pF pF VCC VCC 5.0V 5.0V Conditions www.fairchildsemi.com 4 74ACT16245 Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 5 www.fairchildsemi.com 74ACT16245 16-Bit Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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